HARDWARE DESCRIPTION LANGUAGES AND THEIR APPLICATIONS

Le Monde En Tique

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Ouvrage 0-412-78810-1 : HARDWARE DESCRIPTION LANGUAGES AND THEIR APPLICATIONS
This topic has had a significant history with over 100 Hardware Description Languages (HDL) published in the 1970s. Since the mid-1980s HDLs have become commonplace in microelectronic system design. Presently, we are in a consolidation phase in which languages and standards are increasingly being used, and at the same time as the scope is being broadened to additional application areas (such an analog, microwave or system-level design). This book covers many topics including the most recent advances in: *HDL standards; *new languages; *HDL semantics; *applications of HDL to synthesis, design, etc.; *verification with HDLs. The book comprises the proceedings of the 13th International Conference on Computer Hardware Description Languages and their Applications, sponsored by the International Federation for Information Processing (IFIP), and held in Toledo, Spain in April 1997. It will prove invaluable reading for researchers in engineering and computer science, and for companies involved with hardware design and electronic design automation.
Table of Contents
Specification and design of reactive systems. Synchronous languages for hardware and software reactive systems - G. Berry. Towards a complete design method for embedded systems using predicate/transition-nets - J. Tacken. Verification using model checking techniques and poster abstracts. Simplifying data operations for formal verification - F. Balarin, K. Sajid. CTL and equivalent sublanguages of CTL* - K. Schneider. Verifying linear temporal properties of data insensitive controllers using finite instantiations - R. Hojati, D. Dill, R.K. Brayton. A high-level language for programming complex temporal behaviours and its translation into synchronous circuits - C.-T. Chou, J.-L. Huang, M. Fujita. System-level hardware design with µ-Charts - J. Philipps, P. Scholz. Interface synthesis in embedded hardware-software systems - M. Auguin, C. Belleudy, G. Gogniat. Triple S - a formal validation environment for functional specifications - J.-P. Soininen, J. Saarikettu, V. Veijalainen, T. Huttunen. SOFHIA: a CAD environment to design digital control systems - R.J. Machado, J.M. Fernandes, A.J. Proenca. Compiling the language Balsa to delay insensitive hardware - A. Bardsley, D. Edwards. High-level synthesis of structured data paths - C. Mandal, R.M. Zimmer. Formal Characterizations of systems. Characterizing a portable subset of behavioural VHDL-93 - K. Thirunarayan, R. Ewing. Algebra of communicating timing charts for describing and verifying hardware interfaces - B. Berkane, S. Gandrabur, E. Cherry. A formal proof of absence of deadlock for any acyclic network of PCI buses - F. Corella, R. Shaw, C. Zhang. Analog Language. Behavioural modelling of sampled-data with HDL-A and ABSynth - V. Moser, H.-P. Amann, F. Pellandini. Analog and mixed-signal HDLs - Panel. Languages in design flows. Hardware description languages in practical design flows - R. Camposano. VHDL generation from SDL specification - J.-M. Daveau, G. Fernandes Marchioro, A.A. Jerraya. Exploiting isomorphism for speeding up binding in an integrated scheduling allocation and assignment approach to architectural synthesis - B. Landwehr, P. Marwedel, I. Markhof, R. Domer. Future trends in hardware design. Design and verification flows for large systems in silicon - C. Ussery, S. Curry. Applying the software V-process to the hardware design - M. Heuchling, W. Ecker, M. Mrva. Modular operational semantic specification of transport triggered architectures - J. Mountjoy, P. Hartel, H. Corporaal. Formal methods for asynchronous and distributed systems. The world of I/O: a rich application area for formal methods - F. Corella. Abstract modelling of asynchronous micropipeline systems using rainbow - H. Barringer, D. Fellows, G. Gough, A. Williams. A new partial order reduction algorithm for concurrent system verification - R. Nalumasu, G. Gopalakrishnan. VHDL power simulator: power analysis at gate level - L. Kruse, D. Rabe, W. Nebel. Object orientated extenstions to VHDL. The LaMI proposal - J. Benzakki, B. Djafri.

Auteur : KLOOS
Editeur : STANLEY THORNES
Nombre de pages : 350
Date de publication : 05 1997

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